Western Digital sent shockwaves around the hardware world last year when it announced support for the open-source RISC-V platform.Although still an upstart in the market, RISC-V has been quickly gaining momentum as an alternative to hardware from the likes of AMD or Intel, leading many firms to sign up.So why is WD throwing its weight behind RISC-V? We spoke to company CTO Martin Fink to find out more.
The 10 best NAS devicesWhy did WD, a storage company, decide to actively back the RISC-V architecture?
The primary reason Western Digital is migrating to RISC-V is to expedite the ability to innovate. As data workloads are evolving, new requirements surrounding data are generated. We not only need to store data, we need to extract value from the data as quickly as possible. The “general-purpose” architectures that have been in use for decades are just that, general purpose. These legacy general-purpose built architectures are not conducive for supporting the needs of these dynamic workloads. Due to the proprietary nature of these general-purpose architectures, we cannot easily make the changes needed to optimize for these new workloads. Today’s new Big Data and Fast Data workloads require a more specialized purpose-built architecture so that we are able to add value as close to the data source as possible. RISC-V gives us the flexibility and power to freely innovate and develop products that optimally support the new workloads of today and in the future.
By bringing compute closer to data, what is WD trying to achieve?
The number of deployed devices capturing data in the world is growing at a staggering rate. The sheer volume of this data is requiring efficient and meaningful processing. As we bring compute power closer to data, customers will be able to minimize data movement at the edge and within their data centers, optimizing processing that is based on location, workload or a time-value need.
WD has announced that it will be doubling the number of cores sold (up to 2bn), how do you plan to achieve that?
We currently consume over one billion processor cores on an annual basis across our product portfolio. The number of cores consumed is expected to grow over time. This will be a result of growth in the amount of specialized compute being done closer to the edge where the data lives. As we develop new products going forward, we will be using RISC-V based cores.
Compared to ARM and x86, do you see RISC-V as the Linux equivalent of ISAs?
Yes, RISC-V is much like Linux as they both create an open source solution to proprietary legacy solutions. Both have evolved in an effort to provide the freedom to innovate and lower costs.
What needs to be done, in your opinion, to grow RISC-V as a viable alternative to the two other ISAs?
The key to growing RISC-V lies in the development of the ecosystem. We are seeing a significant growth in the ecosystem in the last year, but we need to accelerate the pace of this growth. We are happy to see other companies, like SiFive, jumping in to also drive expansion and awareness.
Who do you see as being the most important audiences addressed by RISC-V as a platform?
This is difficult, there are so many areas that will benefit from the use of RISC-V. One of the main areas that we are seeing get significant traction is in the area of edge computing. Other areas include, but are not limited to autonomous cars, surveillance, and artificial intelligence/machine learning. There are more and more specialized applications popping up every day that are requiring purpose-built architectures. These new applications would be constrained by the legacy proprietary general-purpose architectures. The processing needs of these applications need to be fine-tuned. RISC-V eliminates the proprietary constraints and enables the freedom to innovate to maximize efficiencies as close to the source of the data as possible. Big data applications such as analytics and machine learning require petabytes of storage and operates in a more batch style processing environment. Conversely, fast data applications like security, event correlation, and block chain tend to require large memory and specialized compute. Again, the RISC-V ISA provides the flexibility to enable the development of solutions to optimize for these applications. Martin Fink is CTO of Western Digital
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